Google
×

Verilog

Programming language
Verilog, standardized as IEEE 1364, is a hardware description language used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. Wikipedia
Designed by: Prabhu Goel, Phil Moorby and Chi-Lai Huang
Developer: IEEE
Filename extensions: v,.vh
First appeared: 1984
Paradigm: Structured
Stable release: IEEE 1800-2023 / 6 December 2023; 4 months ago